1. Field of the Invention
The present invention relates to an integrated circuit package.
2. Description of Related Art
Integrated circuits are typically assembled into a package that is mounted to a printed circuit board. In some packages the integrated circuits are wire bonded to internal bond fingers of the package. The bond fingers are routed to external contacts that are soldered to the printed circuit board. The wire bonding process creates a process step that increases the cost of producing the package. Additionally, the bond wires may create an undesirable inductance within the package.
FIG. 1 shows an integrated circuit package commonly referred to as a "flip chip" package. Flip chip packages allow an integrated circuit 1 to be directly mounted to a substrate 2 without using bond wires. The flip chip substrate 2 is typically constructed as a printed circuit board which contains internal routing layers that couple a plurality of bond pads to external contacts of the substrate 2. The integrated circuit 1 has a plurality of solder bumps 3 that are reflowed to mount the die 1 to the bond pads of the substrate 2.
The integrated circuit 1 typically has a coefficient of thermal expansion that is different than the thermal coefficient of the substrate. As shown in FIG. 2, when the package is thermally cycled the integrated circuit die 1 expands at a different rate than the substrate 2. The differential expansion creates mechanical strain and stresses on the solder bumps 3. When thermally cycled the thermally induced stress may crack the solder bumps 3 and render the package inoperative. It has been found that the solder bumps of a flip chip package may fail at unacceptably high rates when the package is thermally cycled. It would be desirable to have a flip chip package that provides stress relief for the solder bumps to increase the life of the package.